Signature analysis and test scheduling for self-testable circuits

to connected objects

Location: Deutsche Nationalbibliothek Frankfurt am Main

Extent: Online-Ressource

Language: Englisch

Notes: In: Fault-tolerant computing : digest of papers. Los Alamitos, Calif. : IEEE Computer Soc. Pr., 1991. - ISBN 0-8186-2150-8, S. 96-103

Classification: Elektrotechnik, Elektronik

Keyword: Selbsttest ; Integrierte Schaltung ; Fehlermodell

Event: Veröffentlichung

(where): Stuttgart

(who): Universitätsbibliothek der Universität Stuttgart

(when): 2012

Creator: Ströle, Albrecht P.
Wunderlich, Hans-Joachim

URN: urn:nbn:de:bsz:93-opus-73091

Rights: Der Zugriff auf das Objekt ist unbeschränkt möglich.

Last update: 25.03.2025, 1:56 PM CET

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Ströle, Albrecht P.
Wunderlich, Hans-Joachim
Universitätsbibliothek der Universität Stuttgart

Time of origin

2012

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Signature analysis and test scheduling for self-testable circuits

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Other Objects (12)

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