Simulation-based analysis for NBTI degradation in combinational CMOS VLSI circuits

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Location: Deutsche Nationalbibliothek Frankfurt am Main

Extent: Online-Ressource

Language: Englisch

Notes: Stuttgart, Universität Stuttgart, Masterarbeit, 2013

Classification: Elektrotechnik, Elektronik

Event: Veröffentlichung

(where): Stuttgart

(who): Universitätsbibliothek der Universität Stuttgart

(when): 2013

Creator: Georgiev, Zdravko

URN: urn:nbn:de:bsz:93-opus-87008

Rights: Der Zugriff auf das Objekt ist unbeschränkt möglich.

Last update: 14.08.2025, 11:01 AM CEST

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Associated

Georgiev, Zdravko
Universitätsbibliothek der Universität Stuttgart

Time of origin

2013

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Simulation-based analysis for NBTI degradation in combinational CMOS VLSI circuits

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Other Objects (12)

The design of high-speed dynamic CMOS circuits for VLSI

Degradation Models and Optimizations for CMOS Circuits

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VLSI circuits for MIMO preprocessing

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VARICELL : a flexible polycell concept fo CMOS/VLSI

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VLSI circuits for cryptographic authentication

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Design of VLSI circuits : based on VENUS

VARICELL : a flexible polycell concept fo CMOS/VLSI

LowPower-Design-Methoden für VLSI-CMOS-Digitalschaltungen

Routing congestion in VLSI circuits : estimation and optimization

Automated Design Error Debugging of Digital VLSI Circuits

The design of high-speed dynamic CMOS circuits for VLSI

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