Automated Generation of Fault-Resistant Circuits

Abstract: Fault Injection (FI) attacks, which involve intentionally introducing faults into a system to cause it to behave in an unintended manner, are widely recognized and pose a significant threat to the security of cryptographic primitives implemented in hardware, making fault tolerance an increasingly critical concern. However, protecting cryptographic hardware primitives securely and efficiently, even with wellestablished and documented methods such as redundant computation, can be a timeconsuming, error-prone, and expertise-demanding task. In this research, we present a comprehensive and fully-automated software solution for the Automated Generation of Fault-Resistant Circuits (AGEFA). Our application employs a generic and extensively researched methodology for the secure integration of countermeasures based on Error-Correcting Codes (ECCs) into cryptographic hardware circuits. Our software tool allows designers without hardware security expertise to develop fault-tolerant hardware ci.... https://tches.iacr.org/index.php/TCHES/article/view/11672

Location
Deutsche Nationalbibliothek Frankfurt am Main
Extent
Online-Ressource
Language
Englisch

Bibliographic citation
Automated Generation of Fault-Resistant Circuits ; volume:2024 ; number:3 ; year:2024
IACR transactions on cryptographic hardware and embedded systems ; 2024, Heft 3 (2024)

Creator
Müller, Nicolai
Moradi, Amir

DOI
10.46586/tches.v2024.i3.136-173
URN
urn:nbn:de:101:1-2407241856161.996551010900
Rights
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
Last update
14.08.2025, 10:47 AM CEST

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Associated

  • Müller, Nicolai
  • Moradi, Amir

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