Task scheduling on FPGA-based accelerators with limited partial reconfiguration
- Standort
-
Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
Online-Ressource
- Sprache
-
Englisch
- Anmerkungen
-
München, Ludwig-Maximilians-Universität, Dissertation, 2024
- Schlagwort
-
Field programmable gate array
Scheduling
Rekonfiguration
- Ereignis
-
Veröffentlichung
- (wo)
-
München
- (wer)
-
Universitätsbibliothek der Ludwig-Maximilians-Universität
- (wann)
-
2024
- Urheber
- Beteiligte Personen und Organisationen
-
Kranzlmüller, Dieter
- DOI
-
10.5282/edoc.34167
- URN
-
urn:nbn:de:bvb:19-341679
- Rechteinformation
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
15.08.2025, 07:21 MESZ
Datenpartner
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Beteiligte
- Jungblut, Pascal
- Kranzlmüller, Dieter
- Universitätsbibliothek der Ludwig-Maximilians-Universität
Entstanden
- 2024
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