Power Optimization in Wireless Sensor Network Using VLSI Technique on FPGA Platform
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
1 Online-Ressource.
- Sprache
-
Englisch
- Erschienen in
-
Power Optimization in Wireless Sensor Network Using VLSI Technique on FPGA Platform ; volume:56 ; number:2 ; day:28 ; month:3 ; year:2024 ; pages:1-22 ; date:4.2024
Neural processing letters ; 56, Heft 2 (28.3.2024), 1-22, 4.2024
- Klassifikation
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Elektrotechnik, Elektronik
- Urheber
-
Leelakrishnan, Saranya
Chakrapani, Arvind
- Beteiligte Personen und Organisationen
-
SpringerLink (Online service)
- DOI
-
10.1007/s11063-024-11495-2
- URN
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urn:nbn:de:101:1-2407252125094.763178268870
- Rechteinformation
-
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
14.08.2025, 10:46 MESZ
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Beteiligte
- Leelakrishnan, Saranya
- Chakrapani, Arvind
- SpringerLink (Online service)
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