- Location
-
Deutsche Nationalbibliothek Frankfurt am Main
- Extent
-
Online-Ressource
- Language
-
Englisch
- Notes
-
In: 2020 IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 9-11 Sept. 2020, Porto, Portugal, S. 20-27
- Event
-
Veröffentlichung
- (where)
-
Augsburg
- (who)
-
Universität Augsburg
- (when)
-
2020
- Event
-
Veröffentlichung
- (where)
-
Piscataway, NJ
- (who)
-
IEEE
- (when)
-
2020
- Creator
- Contributor
-
Areias, Miguel
Barbosa, Jorge
Dutra, Inês
- DOI
-
10.1109/sbac-pad49847.2020.00014
- URN
-
urn:nbn:de:bvb:384-opus4-811751
- Rights
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
15.08.2025, 7:31 AM CEST
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Amslinger, Rico
- Piatka, Christian
- Haas, Florian
- Weis, Sebastian
- Ungerer, Theo
- Altmeyer, Sebastian
- Areias, Miguel
- Barbosa, Jorge
- Dutra, Inês
- Universität Augsburg
- IEEE
Time of origin
- 2020
Other Objects (12)
Multiversioning hardware transactional memory for fail-operational multithreaded applications
Precise WCET calculation in highly variant real-time systems
A new notion of useful cache block to improve the bounds of cache-related preemption delay
Mixed criticality systems with varying context switch costs
A model-based development environment for rapid-prototyping of latency-sensitive automotive control software
Work-in-progress: design-space exploration of multi-core processors for safety-critical real-time systems
Schedulability analysis of non-preemptive real-time scheduling for multicore processors with shared caches
Fast and precise cache performance estimation for out-of-order execution
Stack memory requirements of AUTOSAR/OSEK-compliant scheduling policies
Schedulability using native non-preemptive groups on an AUTOSAR/OSEK platform with caches
Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems
30th Euromicro Conference on Real-Time Systems: ECRTS 2018, July 3–6, 2018, Barcelona, Spain
Multiversioning hardware transactional memory for fail-operational multithreaded applications
Precise WCET calculation in highly variant real-time systems
A new notion of useful cache block to improve the bounds of cache-related preemption delay
Mixed criticality systems with varying context switch costs
A model-based development environment for rapid-prototyping of latency-sensitive automotive control software
Work-in-progress: design-space exploration of multi-core processors for safety-critical real-time systems
Schedulability analysis of non-preemptive real-time scheduling for multicore processors with shared caches
Fast and precise cache performance estimation for out-of-order execution
Stack memory requirements of AUTOSAR/OSEK-compliant scheduling policies
Schedulability using native non-preemptive groups on an AUTOSAR/OSEK platform with caches
Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems
30th Euromicro Conference on Real-Time Systems: ECRTS 2018, July 3–6, 2018, Barcelona, Spain
Multiversioning hardware transactional memory for fail-operational multithreaded applications
Precise WCET calculation in highly variant real-time systems
A new notion of useful cache block to improve the bounds of cache-related preemption delay
Mixed criticality systems with varying context switch costs
A model-based development environment for rapid-prototyping of latency-sensitive automotive control software
Work-in-progress: design-space exploration of multi-core processors for safety-critical real-time systems
Schedulability analysis of non-preemptive real-time scheduling for multicore processors with shared caches
Fast and precise cache performance estimation for out-of-order execution
Stack memory requirements of AUTOSAR/OSEK-compliant scheduling policies
Schedulability using native non-preemptive groups on an AUTOSAR/OSEK platform with caches
Cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems