Stepwise transformation of algorithms into array processor architectures by the decomp
- Standort
-
Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
Online-Ressource
- Sprache
-
Englisch
- Erschienen in
-
In: Vehlies, U.: Stepwise transformation of algorithms into array processor architectures by the decomp. In: Vlsi Design 3 (1995), Nr. 1, S. 67-80. DOI: https://doi.org/10.1155/1995/76861
- Klassifikation
-
Architektur
- Ereignis
-
Veröffentlichung
- (wo)
-
Hannover, Hannover
- (wer)
-
Gottfried Wilhelm Leibniz Universität Hannover, Technische Informationsbibliothek (TIB)
- (wann)
-
1995
- Urheber
-
Vehlies, U.
- DOI
-
10.15488/2020
- URN
-
urn:nbn:de:101:1-2020080808022259182105
- Rechteinformation
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
25.03.2025, 13:46 MEZ
Datenpartner
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Beteiligte
- Vehlies, U.
- Gottfried Wilhelm Leibniz Universität Hannover, Technische Informationsbibliothek (TIB)
Entstanden
- 1995
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