Floating Gate Transistor‐Based Accurate Digital In‐Memory Computing for Deep Neural Networks

To improve the computing speed and energy efficiency of deep neural network (DNN) applications, in‐memory computing with nonvolatile memory (NVM) is proposed to address the time‐consuming and energy‐hungry data shuttling issue. Herein, a digital in‐memory computing method for convolution computing, which holds the key to DNNs, is proposed. Based on the proposed method, a floating gate transistor‐based in‐memory computing chip for accurate convolution computing with high parallelism is created. The proposed digital in‐memory computing method can achieve the central processing unit (CPU)‐equivalent precision with the same neural network architecture and parameters, different from the analogue or digital–analogue‐mixed in‐memory computing techniques. Based on the fabricated floating gate transistor‐based in‐memory computing chip, a hardware LeNet‐5 neural network is built. The chip achieves 96.25% accuracy on the full Modified National Institute of Standards and Technology database, which is the same as the result computed by the CPU with the same neural network architecture and parameters.

Object Details

• Location: Deutsche Nationalbibliothek Frankfurt am Main
• Extent: Online-Ressource
• Language: Englisch

References and Relationships

• Bibliographic citation: Floating Gate Transistor‐Based Accurate Digital In‐Memory Computing for Deep Neural Networks ; day:08 ; month:11 ; year:2022 ; extent:8 ; Advanced intelligent systems ; (08.11.2022) (gesamt 8)

Contributors, Places and Time

• Creator: Han, Runze ; Huang, Peng ; Xiang, Yachen ; Hu, Hong ; Lin, Sheng ; Dong, Peiyan ; Shen, Wensheng ; Wang, Yanzhi ; Liu, Xiaoyan ; Kang, Jinfeng

Further information

• DOI: 10.1002/aisy.202200127
• URN: urn:nbn:de:101:1-2022110914105802675947
• Rights: Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
• Last update: 15.08.2025, 7:34 AM CEST