AXI4-Stream Upsizing, Downsizing Data Width Converters for Hardware-In-the-Loop Simulations
- Standort
-
Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
Online-Ressource
- Sprache
-
Englisch
- Klassifikation
-
Informatik
- Schlagwort
-
FPGA
Hardware-in-the-loop
Streaming
- Ereignis
-
Veröffentlichung
- (wo)
-
Kaiserslautern
- (wer)
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Technische Universität Kaiserslautern, Fachbereich Elektrotechnik und Informationstechnik
- (wann)
-
2013
- Urheber
-
Vega, Luis
Schläfer, Philipp
Schryver, Christian de
- URN
-
urn:nbn:de:hbz:386-kluedo-34903
- Rechteinformation
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
14.08.2025, 10:59 MESZ
Datenpartner
Dieses Objekt wird bereitgestellt von:
Deutsche Nationalbibliothek. Bei Fragen zum Objekt wenden Sie sich bitte an den Datenpartner.
Deutsche Nationalbibliothek. Bei Fragen zum Objekt wenden Sie sich bitte an den Datenpartner.
Beteiligte
- Vega, Luis
- Schläfer, Philipp
- Schryver, Christian de
- Technische Universität Kaiserslautern, Fachbereich Elektrotechnik und Informationstechnik
Entstanden
- 2013
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