Research and Design of Neural Processing Architectures Optimized for Embedded Applications
- Location
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Deutsche Nationalbibliothek Frankfurt am Main
- Extent
-
Online-Ressource
- Language
-
Englisch
- Notes
-
Dresden, Technische Universität Dresden, Dissertation, 2024
- Keyword
-
Neuronales Netz
Eingebettetes System
Hardwareentwurf
System-on-Chip
Field programmable gate array
Leistungsbewertung
- Event
-
Veröffentlichung
- (where)
-
Dresden
- (who)
-
Technische Universität Dresden
- (when)
-
2024
- Creator
- Contributor
- URN
-
urn:nbn:de:bsz:14-qucosa2-916093
- Rights
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
25.03.2025, 1:42 PM CET
Data provider
This object is provided by:
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Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Wu, Binyi
- Mayr, Christian Georg
- Benini, Luca
- Technische Universität Dresden
Time of origin
- 2024
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