Via Minimization in VLSI Chip Design - Application of a Planar Max-Cut Algorithm

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Location: Deutsche Nationalbibliothek Frankfurt am Main

Extent: Online-Ressource

Language: Englisch

Event: Veröffentlichung

(where): Köln

(who): Universitäts- und Stadtbibliothek Köln

(when): 2011

Creator: Liers, Frauke
Nieberg, Tim
Pardella, Gregor

URN: urn:nbn:de:hbz:38-550186

Rights: Der Zugriff auf das Objekt ist unbeschränkt möglich.

Last update: 15.08.2025, 7:21 AM CEST

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Associated

Liers, Frauke
Nieberg, Tim
Pardella, Gregor
Universitäts- und Stadtbibliothek Köln

Time of origin

2011

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Via Minimization in VLSI Chip Design - Application of a Planar Max-Cut Algorithm

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Other Objects (12)

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