Development of a resource-efficient FPGA-based neural network regression model for the ATLAS muon trigger upgrades
- Location
-
Deutsche Nationalbibliothek Frankfurt am Main
- ISSN
-
1434-6052
- Extent
-
Online-Ressource
- Language
-
Englisch
- Notes
-
online resource.
- Bibliographic citation
-
Development of a resource-efficient FPGA-based neural network regression model for the ATLAS muon trigger upgrades ; volume:82 ; number:6 ; day:30 ; month:6 ; year:2022 ; pages:1-12 ; date:6.2022
The European physical journal / C. C, Particles and fields ; 82, Heft 6 (30.6.2022), 1-12, 6.2022
- Creator
-
Ospanov, Rustem
Feng, Changqing
Dong, Wenhao
Feng, Wenhao
Zhang, Kan
Yang, Shining
- Contributor
-
SpringerLink (Online service)
- DOI
-
10.1140/epjc/s10052-022-10521-8
- URN
-
urn:nbn:de:101:1-2022082109213085383472
- Rights
-
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
30.03.20242025, 2:36 PM CEST
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Ospanov, Rustem
- Feng, Changqing
- Dong, Wenhao
- Feng, Wenhao
- Zhang, Kan
- Yang, Shining
- SpringerLink (Online service)
Other Objects (12)
An FPGA-based preprocessor for the ALICE High-Level-Trigger
Upgrade of the CMS Global Muon Trigger
FPGA-Based System Virtual Machines
An FPGA-based 3D backprojector
FPGA-based high performance AC drives
FPGA-based Speed Limit Sign Detection
FPGA-based evaluation of cryptographic algorithms
Development of the FPGA-based raw data preprocessor for the TPC readout upgrade in ALICE
Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
Upgrade of the global muon trigger at the CMS experiment
Automated debugging methodology for FPGA-based systems
Automated Debugging Methodology for FPGA-based Systems
An FPGA-based preprocessor for the ALICE High-Level-Trigger
Upgrade of the CMS Global Muon Trigger
FPGA-Based System Virtual Machines
An FPGA-based 3D backprojector
FPGA-based high performance AC drives
FPGA-based Speed Limit Sign Detection
FPGA-based evaluation of cryptographic algorithms
Development of the FPGA-based raw data preprocessor for the TPC readout upgrade in ALICE
Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
Upgrade of the global muon trigger at the CMS experiment
Automated debugging methodology for FPGA-based systems
Automated Debugging Methodology for FPGA-based Systems
An FPGA-based preprocessor for the ALICE High-Level-Trigger
Upgrade of the CMS Global Muon Trigger
FPGA-Based System Virtual Machines
An FPGA-based 3D backprojector
FPGA-based high performance AC drives
FPGA-based Speed Limit Sign Detection
FPGA-based evaluation of cryptographic algorithms
Development of the FPGA-based raw data preprocessor for the TPC readout upgrade in ALICE
Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
Upgrade of the global muon trigger at the CMS experiment
Automated debugging methodology for FPGA-based systems