Si‐Based Dual‐Gate Field‐Effect Transistor Array for Low‐Power On‐Chip Trainable Hardware Neural Networks
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
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Online-Ressource
- Sprache
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Englisch
- Erschienen in
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Si‐Based Dual‐Gate Field‐Effect Transistor Array for Low‐Power On‐Chip Trainable Hardware Neural Networks ; day:05 ; month:11 ; year:2023 ; extent:13
Advanced intelligent systems ; (05.11.2023) (gesamt 13)
- Urheber
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Lee, Kyu-Ho
Kwon, Dongseok
Lee, In-Seok
Hwang, Joon
Im, Jiseong
Bae, Jong-Ho
Choi, Woo Young
Woo, Sung Yun
Lee, Jong-Ho
- DOI
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10.1002/aisy.202300490
- URN
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urn:nbn:de:101:1-2023110614141639080504
- Rechteinformation
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Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
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14.08.2025, 10:46 MESZ
Datenpartner
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Beteiligte
- Lee, Kyu-Ho
- Kwon, Dongseok
- Lee, In-Seok
- Hwang, Joon
- Im, Jiseong
- Bae, Jong-Ho
- Choi, Woo Young
- Woo, Sung Yun
- Lee, Jong-Ho
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