Hochschulschrift
On the design of IEEE compliant floating-point units and their quantitative analysis
- Standort
-
Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
Online-Ressource
- Sprache
-
Englisch
- Anmerkungen
-
Erscheinungsjahr an der Haupttitelstelle: 1999
Saarbrücken, Univ., Diss., 2000
- Schlagwort
-
Mikroprozessor
Gleitkommarechnung
Mikroprozessor ; Gleitkommarechnung
- Urheber
- URN
-
urn:nbn:de:bsz:291-scidok-11894
- Rechteinformation
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
25.03.2025, 13:52 MEZ
Datenpartner
Dieses Objekt wird bereitgestellt von:
Deutsche Nationalbibliothek. Bei Fragen zum Objekt wenden Sie sich bitte an den Datenpartner.
Deutsche Nationalbibliothek. Bei Fragen zum Objekt wenden Sie sich bitte an den Datenpartner.
Objekttyp
- Hochschulschrift
Beteiligte
Ähnliche Objekte (12)
On the design of IEEE compliant floating point units and their quantitative analysis
Formal verification of a fully IEEE compliant floating point unit
Formal verification of a fully IEEE compliant floating point unit
Optimal Design of Fixed-Point and Floating-Point Arithmetic Units for Scientific Applications
Optimal design of fixed-point and floating-point arithmetic units for scientific applications
Segment LLL-reduction with floating point orthogonalization
High precision floating point numbers in LEDA
Network Storage Covert Channels in Sensor Data Transmissions based on Recoding IEEE 754-compliant Number Representations
Verified compilation and optimization of floating-point kernels
Floating-point architectures for energy-efficient transprecision computing
A Two-Phase Approach for Conditional Floating-Point Verification
A Compiler for Sound Floating-Point using Affine Arithmetic
On the design of IEEE compliant floating point units and their quantitative analysis
Formal verification of a fully IEEE compliant floating point unit
Formal verification of a fully IEEE compliant floating point unit
Optimal Design of Fixed-Point and Floating-Point Arithmetic Units for Scientific Applications
Optimal design of fixed-point and floating-point arithmetic units for scientific applications
Segment LLL-reduction with floating point orthogonalization
High precision floating point numbers in LEDA
Network Storage Covert Channels in Sensor Data Transmissions based on Recoding IEEE 754-compliant Number Representations
Verified compilation and optimization of floating-point kernels
Floating-point architectures for energy-efficient transprecision computing
A Two-Phase Approach for Conditional Floating-Point Verification
A Compiler for Sound Floating-Point using Affine Arithmetic
On the design of IEEE compliant floating point units and their quantitative analysis
Formal verification of a fully IEEE compliant floating point unit
Formal verification of a fully IEEE compliant floating point unit
Optimal Design of Fixed-Point and Floating-Point Arithmetic Units for Scientific Applications
Optimal design of fixed-point and floating-point arithmetic units for scientific applications
Segment LLL-reduction with floating point orthogonalization
High precision floating point numbers in LEDA
Network Storage Covert Channels in Sensor Data Transmissions based on Recoding IEEE 754-compliant Number Representations
Verified compilation and optimization of floating-point kernels
Floating-point architectures for energy-efficient transprecision computing
A Two-Phase Approach for Conditional Floating-Point Verification