OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM
Abstract: The Multi-Scalar Multiplication (MSM) is the main barrier to accelerating Zero-Knowledge applications. In recent years, hardware acceleration of this algorithm on both FPGA and GPU has become a popular research topic and the subject of a multi-million dollar prize competition (ZPrize). This work presents OPTIMSM: Optimized Processing Through Iterative Multi-Scalar Multiplication. This novel accelerator focuses on the acceleration of the MSM algorithm for any Elliptic Curve (EC) by improving upon the Pippenger algorithm. A new iteration technique is introduced to decouple the required buckets from the window size, resulting in fewer EC computations for the same on-chip memory resources. Furthermore, we combine known optimizations from the literature for the first time to achieve additional latency improvements. Our enhanced MSM implementation significantly reduces computation time, achieving a speedup of up to x12.77 compared to recent FPGA implementations. Specifically, for the BLS.... https://tches.iacr.org/index.php/TCHES/article/view/12055
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
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Online-Ressource
- Sprache
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Englisch
- Erschienen in
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OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM ; volume:2025 ; number:2 ; year:2025
IACR transactions on cryptographic hardware and embedded systems ; 2025, Heft 2 (2025)
- Urheber
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Pottier, Xander
de Ruijter, Thomas
Bertels, Jonas
Legiest, Wouter
Van Beirendonck, Michiel
Verbauwhede, Ingrid
- DOI
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10.46586/tches.v2025.i2.489-510
- URN
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urn:nbn:de:101:1-2503121759092.646935516793
- Rechteinformation
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Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
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15.08.2025, 07:37 MESZ
Datenpartner
Deutsche Nationalbibliothek. Bei Fragen zum Objekt wenden Sie sich bitte an den Datenpartner.
Beteiligte
- Pottier, Xander
- de Ruijter, Thomas
- Bertels, Jonas
- Legiest, Wouter
- Van Beirendonck, Michiel
- Verbauwhede, Ingrid
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