- Location
-
Deutsche Nationalbibliothek Frankfurt am Main
- Dimensions
-
30 cm
- Extent
-
X, 106 S.
- Language
-
Englisch
- Notes
-
graph. Darst.
Cottbus, Techn. Univ., Diss., 2000
- Keyword
-
Eingebettetes System
Hardwareentwurf
Softwareentwicklung
Eingebettetes System
Datenfluss
Kontrollfluss
Timingsimulation
Codegenerierung
HOL
- Creator
- Table of contents
- Rights
-
Bei diesem Objekt liegt nur das Inhaltsverzeichnis digital vor. Der Zugriff darauf ist unbeschränkt möglich.
- Last update
-
11.06.2025, 2:09 PM CEST
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Object type
- Hochschulschrift
Associated
Other Objects (12)
Global Timing Optimization in Chip Design
Logic restructuring for timing optimization in VLSI design
Iterative design space exploration and robustness optimization for embedded systems
Software performance estimation methods for system level design of embedded systems
Software performance estimation methods for system-level design of embedded systems
Dependability driven system level co-design and optimization of embedded systems
Supporting timing analysis of vehicular embedded systems through the refinement of timing constraints
Integrated timing verification for distributed embedded real-time systems
Early Timing Exploration of Embedded Software for Heterogeneous Platforms
Numerical simulation methods for embedded optimization
Timing black-box attacks: crafting adversarial examples through timing leaks against DNNs on embedded devices
Modular timing analysis of component-based real-time embedded systems
Global Timing Optimization in Chip Design
Logic restructuring for timing optimization in VLSI design
Iterative design space exploration and robustness optimization for embedded systems
Software performance estimation methods for system level design of embedded systems
Software performance estimation methods for system-level design of embedded systems
Dependability driven system level co-design and optimization of embedded systems
Supporting timing analysis of vehicular embedded systems through the refinement of timing constraints
Integrated timing verification for distributed embedded real-time systems
Early Timing Exploration of Embedded Software for Heterogeneous Platforms
Numerical simulation methods for embedded optimization
Timing black-box attacks: crafting adversarial examples through timing leaks against DNNs on embedded devices
Modular timing analysis of component-based real-time embedded systems
Global Timing Optimization in Chip Design
Logic restructuring for timing optimization in VLSI design
Iterative design space exploration and robustness optimization for embedded systems
Software performance estimation methods for system level design of embedded systems
Software performance estimation methods for system-level design of embedded systems
Dependability driven system level co-design and optimization of embedded systems
Supporting timing analysis of vehicular embedded systems through the refinement of timing constraints
Integrated timing verification for distributed embedded real-time systems
Early Timing Exploration of Embedded Software for Heterogeneous Platforms
Numerical simulation methods for embedded optimization
Timing black-box attacks: crafting adversarial examples through timing leaks against DNNs on embedded devices