Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- ISSN
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1573-1979
- Umfang
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Online-Ressource
- Sprache
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Englisch
- Anmerkungen
-
online resource.
- Erschienen in
-
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters ; volume:109 ; number:3 ; day:25 ; month:8 ; year:2021 ; pages:647-656 ; date:12.2021
Analog integrated circuits and signal processing ; 109, Heft 3 (25.8.2021), 647-656, 12.2021
- Klassifikation
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Elektrotechnik, Elektronik
- Urheber
-
Castro, Mateus B.
Souza, Raphael R. N.
Junior, Agord M. P.
Lima, Eduardo R.
Manera, Leandro T.
- Beteiligte Personen und Organisationen
-
SpringerLink (Online service)
- DOI
-
10.1007/s10470-021-01925-9
- URN
-
urn:nbn:de:101:1-2022010319564973446521
- Rechteinformation
-
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
15.08.2025, 07:35 MESZ
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Beteiligte
- Castro, Mateus B.
- Souza, Raphael R. N.
- Junior, Agord M. P.
- Lima, Eduardo R.
- Manera, Leandro T.
- SpringerLink (Online service)
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