Learning parity with physical noise: imperfections, reductions and FPGA prototype

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Location: Deutsche Nationalbibliothek Frankfurt am Main

Extent: Online-Ressource

Language: Englisch

Bibliographic citation: Learning parity with physical noise: imperfections, reductions and FPGA prototype ; volume:2021 ; number:3 ; pages:390-417
IACR transactions on cryptographic hardware and embedded systems ; 2021, Heft 3, 390-417

Classification: Informatik

Creator: Bellizia, Davide
Hoffmann, Clément
Kamel, Dina
Liu, Hanlin
Méaux, Pierrick
Standaert, François-Xavier
Yu, Yu

DOI: 10.46586/tches.v2021.i3.390-417

URN: urn:nbn:de:hbz:294-TCHES-1948

Rights: Der Zugriff auf das Objekt ist unbeschränkt möglich.

Last update: 15.08.2025, 7:30 AM CEST

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Bellizia, Davide
Hoffmann, Clément
Kamel, Dina
Liu, Hanlin
Méaux, Pierrick
Standaert, François-Xavier
Yu, Yu

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Learning parity with physical noise: imperfections, reductions and FPGA prototype

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