FalconSign: An Efficient and High-Throughput Hardware Architecture for Falcon Signature Generation

Abstract: Falcon is a lattice-based quantum-resistant digital signature scheme renowned for its high signature generation/verification speed and compact signature size. The scheme has been selected to be drafted in the third round of the post-quantum cryptography (PQC) standardization process due to its unique attributes and robust security features. Despite its strengths, there has been a lack of research on hardware acceleration, primarily due to its complex calculation flow and floating-point operations, which hinders its widespread adoption. To address this issue, we propose FalconSign, a high-performance, configurable crypto-processor designed to accelerate Falcon signature generation on FPGA/ASIC through algorithmhardware co-design. Our approach involves a new scheduling flow and architecture for Fast-Fourier Sampling to enhance computing unit reuse and reduce processing time. Additionally, we introduce several optimized modules, including configurable randomness generation units, para.... https://ojs.ub.rub.de/index.php/TCHES/article/view/11927

Angaben zum Objekt

• Standort: Deutsche Nationalbibliothek Frankfurt am Main
• Umfang: Online-Ressource
• Sprache: Englisch

Verweise und Beziehungen

• Erschienen in: FalconSign: An Efficient and High-Throughput Hardware Architecture for Falcon Signature Generation ; volume:2025 ; number:1 ; year:2024 ; IACR transactions on cryptographic hardware and embedded systems ; 2025, Heft 1 (2024)

Beteiligte, Orts- und Zeitangaben

• Urheber: Ouyang, Yi ; Zhu, Yihong ; Zhu, Wenping ; Yang, Bohan ; Zhang, Zirui ; Wang, Hanning ; Tao, Qichao ; Zhu, Min ; Wei, Shaojun ; Liu, Leibo

Weitere Informationen

• DOI: 10.46586/tches.v2025.i1.203-226
• URN: urn:nbn:de:101:1-2412181755164.790738062390
• Rechteinformation: Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
• Letzte Aktualisierung: 15.08.2025, 07:35 MESZ