Design study of gate-all-around vertically stacked nanosheet FETs for sub-7nm nodes
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- ISSN
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2523-3971
- Umfang
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Online-Ressource
- Sprache
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Englisch
- Anmerkungen
-
online resource.
- Erschienen in
-
Design study of gate-all-around vertically stacked nanosheet FETs for sub-7nm nodes ; volume:3 ; number:5 ; day:7 ; month:4 ; year:2021 ; pages:1-13 ; date:5.2021
SN applied sciences ; 3, Heft 5 (7.4.2021), 1-13, 5.2021
- Urheber
-
Mohapatra, E.
Dash, T. P.
Jena, J.
Das, S.
Maiti, C. K.
- Beteiligte Personen und Organisationen
-
SpringerLink (Online service)
- DOI
-
10.1007/s42452-021-04539-y
- URN
-
urn:nbn:de:101:1-2021052908341879139291
- Rechteinformation
-
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
14.08.2025, 11:00 MESZ
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Beteiligte
- Mohapatra, E.
- Dash, T. P.
- Jena, J.
- Das, S.
- Maiti, C. K.
- SpringerLink (Online service)
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