Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices

Location
Deutsche Nationalbibliothek Frankfurt am Main
ISSN
1687-3963
Extent
Online-Ressource
Language
Englisch
Notes
online resource.

Bibliographic citation
Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices ; volume:2017 ; number:1 ; day:21 ; month:2 ; year:2017 ; pages:1-18 ; date:12.2017
EURASIP journal on embedded systems / European Association for Speech, Signal and Image Processing ; 2017, Heft 1 (21.2.2017), 1-18, 12.2017

Classification
Informatik

Creator
Shahrouzi, S. Navid
Contributor
Perera, Darshika G.
SpringerLink (Online service)

DOI
10.1186/s13639-017-0074-x
URN
urn:nbn:de:1111-201703226473
Rights
Der Zugriff auf das Objekt ist unbeschränkt möglich.
Last update
14.08.2025, 10:45 AM CEST

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Associated

  • Shahrouzi, S. Navid
  • Perera, Darshika G.
  • SpringerLink (Online service)

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