Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic
- Standort
-
Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
-
Online-Ressource
- Sprache
-
Englisch
- Klassifikation
-
Elektrotechnik, Elektronik
- Ereignis
-
Veröffentlichung
- (wo)
-
Aachen
- (wer)
-
Universitätsbibliothek der RWTH Aachen
- (wann)
-
2023
- Urheber
-
Moussavi, Elmira
Singh, Animesh
Sisejkovic, Dominik
Kumar, Aravind Padma
Kizatov, Daniyar
Ingebrandt, Sven
Leupers, Rainer
Pachauri, Vivek
Merchant, Farhad
- DOI
-
10.18154/RWTH-2023-04361
- URN
-
urn:nbn:de:101:1-2406080132504.804047189159
- Rechteinformation
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
-
25.03.2025, 13:49 MEZ
Datenpartner
Dieses Objekt wird bereitgestellt von:
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Beteiligte
- Moussavi, Elmira
- Singh, Animesh
- Sisejkovic, Dominik
- Kumar, Aravind Padma
- Kizatov, Daniyar
- Ingebrandt, Sven
- Leupers, Rainer
- Pachauri, Vivek
- Merchant, Farhad
- Universitätsbibliothek der RWTH Aachen
Entstanden
- 2023
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