Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic

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Location: Deutsche Nationalbibliothek Frankfurt am Main

Extent: Online-Ressource

Language: Englisch

Classification: Elektrotechnik, Elektronik

Event: Veröffentlichung

(where): Aachen

(who): Universitätsbibliothek der RWTH Aachen

(when): 2023

Creator: Moussavi, Elmira
Singh, Animesh
Sisejkovic, Dominik
Kumar, Aravind Padma
Kizatov, Daniyar
Ingebrandt, Sven
Leupers, Rainer
Pachauri, Vivek
Merchant, Farhad

DOI: 10.18154/RWTH-2023-04361

URN: urn:nbn:de:101:1-2406080132504.804047189159

Rights: Der Zugriff auf das Objekt ist unbeschränkt möglich.

Last update: 03.08.2025, 1:06 AM CEST

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Associated

Moussavi, Elmira
Singh, Animesh
Sisejkovic, Dominik
Kumar, Aravind Padma
Kizatov, Daniyar
Ingebrandt, Sven
Leupers, Rainer
Pachauri, Vivek
Merchant, Farhad
Universitätsbibliothek der RWTH Aachen

Time of origin

2023

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Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic

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Other Objects (12)

Threshold Voltage Control in Dual-Gate Organic Electrochemical Transistors

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Reconfigurable spintronic logic gate utilizing precessional magnetization switching

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Characterization and Modeling of the Threshold Voltage Instability in p-Gate GaN HEMTs

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Accurate Field‐Effect Mobility and Threshold Voltage Estimation for Thin‐Film Transistors with Gate‐Voltage‐Dependent Mobility in Linear Region

Reconfigurable spintronic logic gate utilizing precessional magnetization switching

Gate-defined quantum dots in bilayer graphene

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Characterization and Modeling of the Threshold Voltage Instability in p-Gate GaN HEMTs

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Accurate Field‐Effect Mobility and Threshold Voltage Estimation for Thin‐Film Transistors with Gate‐Voltage‐Dependent Mobility in Linear Region

Reconfigurable spintronic logic gate utilizing precessional magnetization switching

Gate-defined quantum dots in bilayer graphene

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