A fast large-integer extended GCD algorithm and hardware design for verifiable delay functions and modular inversion
- Standort
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Deutsche Nationalbibliothek Frankfurt am Main
- Umfang
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Online-Ressource
- Sprache
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Englisch
- Erschienen in
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A fast large-integer extended GCD algorithm and hardware design for verifiable delay functions and modular inversion ; volume:2022 ; number:4 ; pages:163-187
IACR transactions on cryptographic hardware and embedded systems ; 2022, Heft 4, 163-187
- Klassifikation
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Informatik
- Urheber
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Sreedhar, Kavya
Horowitz, Mark
Torng, Christopher
- DOI
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10.46586/tches.v2022.i4.163-187
- URN
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urn:nbn:de:hbz:294-TCHES-2862
- Rechteinformation
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Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Letzte Aktualisierung
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30.01.2025, 14:25 MEZ
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Beteiligte
- Sreedhar, Kavya
- Horowitz, Mark
- Torng, Christopher
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