Optimized Hardware-Software Co-Design for Kyber and Dilithium on RISC-V SoC FPGA
Abstract: Kyber and Dilithium are both lattice-based post-quantum cryptography (PQC) algorithms that have been selected for standardization by the American National Institute of Standards and Technology (NIST). NIST recommends them as two primary algorithms to be implemented for most use cases. As the applications of RISC-V processors move from specialized scenarios to general scenarios, efficient implementations of PQC algorithms on general-purpose RISC-V platforms are required. In this work, we present an optimized hardware-software co-design for Kyber and Dilithium on the industry’s first RISC-V System-on-Chip (SoC) Field Programmable Gate Array (FPGA) platform. The performance of both algorithms is enhanced through the utilization of hardware acceleration and software optimization, while a certain level of flexibility is still maintained. The polynomial arithmetic operations in Kyber and Dilithium are accelerated by the customized accelerators. We employ a unified high-level architecture.... https://tches.iacr.org/index.php/TCHES/article/view/11671
- Location
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Deutsche Nationalbibliothek Frankfurt am Main
- Extent
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Online-Ressource
- Language
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Englisch
- Bibliographic citation
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Optimized Hardware-Software Co-Design for Kyber and Dilithium on RISC-V SoC FPGA ; volume:2024 ; number:3 ; year:2024
IACR transactions on cryptographic hardware and embedded systems ; 2024, Heft 3 (2024)
- Creator
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Wang, Tengfei
Zhang, Chi
Zhang, Xiaolin
Gu, Dawu
Cao, Pei
- DOI
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10.46586/tches.v2024.i3.99-135
- URN
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urn:nbn:de:101:1-2407241856228.373655849357
- Rights
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Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
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14.08.2025, 10:51 AM CEST
Data provider
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Wang, Tengfei
- Zhang, Chi
- Zhang, Xiaolin
- Gu, Dawu
- Cao, Pei
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