Hardware for Deep Learning Acceleration

Deep learning (DL) has proven to be one of the most pivotal components of machine learning given its notable performance in a variety of application domains. Neural networks (NNs) for DL are tailored to specific application domains by varying in their topology and activation nodes. Nevertheless, the major operation type (with the largest computational complexity) is commonly multiply‐accumulate operation irrespective of their topology. Recent trends in DL highlight the evolution of NNs such that they become deeper and larger, and thus their prohibitive computational complexity. To cope with the consequent prohibitive latency for computation, 1) general‐purpose hardware, e.g., central processing units and graphics processing units, has been redesigned, and 2) various DL accelerators have been newly introduced, e.g., neural processing units, and computing‐in‐memory units for deep NN‐based DL, and neuromorphic processors for spiking NN‐based DL. In this review, these accelerators and their pros and cons are overviewed with particular focus on their performance and memory bandwidth.

Standort
Deutsche Nationalbibliothek Frankfurt am Main
Umfang
Online-Ressource
Sprache
Englisch

Erschienen in
Hardware for Deep Learning Acceleration ; day:21 ; month:03 ; year:2024 ; extent:20
Advanced intelligent systems ; (21.03.2024) (gesamt 20)

Urheber
Song, Choongseok
Ye, ChangMin
Sim, Yonguk
Jeong, Doo Seok

DOI
10.1002/aisy.202300762
URN
urn:nbn:de:101:1-2024032213160223807214
Rechteinformation
Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
Letzte Aktualisierung
14.08.2025, 10:53 MESZ

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Beteiligte

  • Song, Choongseok
  • Ye, ChangMin
  • Sim, Yonguk
  • Jeong, Doo Seok

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