Hochschulschrift
An accurate compact CMOS transistor model with the special emphasis on analog circuits simulation
- Location
-
Deutsche Nationalbibliothek Frankfurt am Main
- ISBN
-
9783826514302
3826514300
- Dimensions
-
21 cm
- Extent
-
123 S.
- Edition
-
Als Ms. gedr.
- Language
-
Deutsch
- Notes
-
graph. Darst.
Zugl.: Kaiserslautern, Univ., Diss., 1996
- Keyword
-
MOS-FET
CMOS
PSPICE
- Event
-
Veröffentlichung
- (where)
-
Aachen
- (who)
-
Shaker
- (when)
-
1996
- Creator
-
Dong, Li
- Table of contents
- Rights
-
Bei diesem Objekt liegt nur das Inhaltsverzeichnis digital vor. Der Zugriff darauf ist unbeschränkt möglich.
- Last update
-
11.03.2025, 12:10 PM CET
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Object type
- Hochschulschrift
Associated
- Dong, Li
- Shaker
Time of origin
- 1996
Other Objects (12)
Metastability in digital circuits with emphasis on CMOS technology amplifier
Transistor sizing for timing optimization of combinational digital CMOS circuits
Evolution of transistor circuits
Characterization and compact modeling of printed electrolyte-gated thin film transistors and circuits
Terahertz Circuits and Systems in CMOS
Degradation Models and Optimizations for CMOS Circuits
Transistor-Level Layout of Integrated Circuits
Transistor-level layout of integrated circuits
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Field effect transistor based CMOS stress sensors
CMOS circuits design and optimization for subretinal implants
Metastability in digital circuits with emphasis on CMOS technology amplifier
Transistor sizing for timing optimization of combinational digital CMOS circuits
Evolution of transistor circuits
Characterization and compact modeling of printed electrolyte-gated thin film transistors and circuits
Terahertz Circuits and Systems in CMOS
Degradation Models and Optimizations for CMOS Circuits
Transistor-Level Layout of Integrated Circuits
Transistor-level layout of integrated circuits
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Field effect transistor based CMOS stress sensors
CMOS circuits design and optimization for subretinal implants
Metastability in digital circuits with emphasis on CMOS technology amplifier
Transistor sizing for timing optimization of combinational digital CMOS circuits
Evolution of transistor circuits
Characterization and compact modeling of printed electrolyte-gated thin film transistors and circuits
Terahertz Circuits and Systems in CMOS
Degradation Models and Optimizations for CMOS Circuits
Transistor-Level Layout of Integrated Circuits
Transistor-level layout of integrated circuits
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Verspannungstechniken zur Leistungssteigerung von SOI-CMOS-Transistoren
Field effect transistor based CMOS stress sensors