Scenario-based meta-scheduling for energy-efficient, robust and adaptive time-triggered multi-core architectures
- Location
-
Deutsche Nationalbibliothek Frankfurt am Main
- Extent
-
Online-Ressource
- Language
-
Englisch
- Notes
-
Siegen, Universität Siegen, Dissertation, 2019
- Keyword
-
Time
Scheduling
Sicherheitskritisches System ; Network-on-Chip ; Energieeffizienz ; Mehrkernprozessor ; Scheduling
- Event
-
Veröffentlichung
- (where)
-
Siegen
- (who)
-
Universitätsbibliothek der Universität Siegen
- (when)
-
2019
- Creator
- URN
-
urn:nbn:de:hbz:467-14715
- Rights
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
25.03.2025, 1:52 PM CET
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Sorkhpour, Babak
- Universitätsbibliothek der Universität Siegen
Time of origin
- 2019
Other Objects (12)
Query processing on multi-core architectures
TIMEA: Time-triggered message-based multicore architecture for AUTOSAR
Predictable and high performance multi-core architectures
Network Coding Strategies for Multi-Core Architectures
Network coding strategies for multi-core architectures
Exploiting Speculative and Asymmetric Execution on Multicore Architectures
A Reconfigurable Processor for Heterogeneous Multi-Core Architectures
Schedule Synthesis for Time-Triggered Automotive Architectures
Energy-efficient cloud computing application solutions and architectures
Floating-point architectures for energy-efficient transprecision computing
Scheduling event-triggered and time-triggered applications with optimal reliability and predictability on networked multi-core chips
Sophisticated mediterranean climatedesign : collaborative proposals for energy-efficient architectures
Query processing on multi-core architectures
TIMEA: Time-triggered message-based multicore architecture for AUTOSAR
Predictable and high performance multi-core architectures
Network Coding Strategies for Multi-Core Architectures
Network coding strategies for multi-core architectures
Exploiting Speculative and Asymmetric Execution on Multicore Architectures
A Reconfigurable Processor for Heterogeneous Multi-Core Architectures
Schedule Synthesis for Time-Triggered Automotive Architectures
Energy-efficient cloud computing application solutions and architectures
Floating-point architectures for energy-efficient transprecision computing
Scheduling event-triggered and time-triggered applications with optimal reliability and predictability on networked multi-core chips
Sophisticated mediterranean climatedesign : collaborative proposals for energy-efficient architectures
Query processing on multi-core architectures
TIMEA: Time-triggered message-based multicore architecture for AUTOSAR
Predictable and high performance multi-core architectures
Network Coding Strategies for Multi-Core Architectures
Network coding strategies for multi-core architectures
Exploiting Speculative and Asymmetric Execution on Multicore Architectures
A Reconfigurable Processor for Heterogeneous Multi-Core Architectures
Schedule Synthesis for Time-Triggered Automotive Architectures
Energy-efficient cloud computing application solutions and architectures
Floating-point architectures for energy-efficient transprecision computing
Scheduling event-triggered and time-triggered applications with optimal reliability and predictability on networked multi-core chips