Time Constrained Verification of Analog Circuits using Model-Checking Algorithms
- Location
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Deutsche Nationalbibliothek Frankfurt am Main
- Extent
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Online-Ressource
- Language
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Englisch
- Bibliographic citation
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In: Grabowski, D.; Platte, D.; Hedrich, L.; Barke, E.: Time Constrained Verification of Analog Circuits using Model-Checking Algorithms. In: Electronic Notes in Theoretical Computer Science 153 (2006), Nr. 3, S. 37-52. DOI: https://doi.org/10.1016/j.entcs.2006.01.026
- Classification
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Politik
- Event
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Veröffentlichung
- (where)
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Hannover
- (who)
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Gottfried Wilhelm Leibniz Universität Hannover
- (when)
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2006
- Event
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Veröffentlichung
- (where)
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Hannover
- (who)
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Technische Informationsbibliothek (TIB)
- (when)
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2006
- Creator
- DOI
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10.15488/1925
- URN
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urn:nbn:de:101:1-2020080807554719244357
- Rights
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Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
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14.08.2025, 10:56 AM CEST
Data provider
This object is provided by:
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Associated
- Grabowski, Darius
- Platte, Daniel
- Hedrich, Lars
- Barke, Erich
- Gottfried Wilhelm Leibniz Universität Hannover
- Technische Informationsbibliothek (TIB)
Time of origin
- 2006
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