Hochschulschrift | Online-Publikation
Layout and structure aware synthesis of integrated circuits
- Location
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Deutsche Nationalbibliothek Frankfurt am Main
- Extent
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Online-Ressource
- Language
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Englisch
- Notes
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Kaiserslautern, Univ., Diss., 2003
- Classification
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Ingenieurwissenschaften und Maschinenbau
- Keyword
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VLSI
Entwurfsautomation
Logiksynthese
Layout
Verzögerungszeit
Logiksynthese ; Layout ; Regularität ; CAD ; Entwurfsautomation
- Creator
- URN
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urn:nbn:de:hbz:386-kluedo-17404
- Rights
-
Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
25.03.2025, 1:45 PM CET
Data provider
This object is provided by:
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Deutsche Nationalbibliothek. If you have any questions about the object, please contact the data provider.
Object type
- Hochschulschrift
- Online-Publikation
Associated
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Aging aware robustness validation of digital integrated circuits
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Coplanar microwave integrated circuits
Technology of integrated circuits
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Layout synthesis of analog integrated circuits
User-controlled layout synthesis for analog integrated circuits
User controlled layout synthesis for analog integrated circuits
Transistor-Level Layout of Integrated Circuits
Transistor-level layout of integrated circuits
Aging aware robustness validation of digital integrated circuits
Aging-Aware Design Methods for Reliable Analog Integrated Circuits using Operating Point-Dependent Degradation
Coplanar microwave integrated circuits
Technology of integrated circuits