Implementing EW Receivers Based on Large Point Reconfigured FFT on FPGA Platforms
- Location
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Deutsche Nationalbibliothek Frankfurt am Main
- Extent
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1 Online-Ressource.
- Language
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Englisch
- Bibliographic citation
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Implementing EW Receivers Based on Large Point Reconfigured FFT on FPGA Platforms ; volume:4 ; number:6 ; day:1 ; month:12 ; year:2011 ; pages:1131-1139 ; date:12.2011
International journal of computational intelligence systems ; 4, Heft 6 (1.12.2011), 1131-1139, 12.2011
- Classification
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Elektrotechnik, Elektronik
- Creator
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Chen, He
Qu, Xiujie
Luo, Yuedong
Deng, Chenwei
- Contributor
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SpringerLink (Online service)
- DOI
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10.2991/ijcis.2011.4.6.3
- URN
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urn:nbn:de:101:1-2024040813430054647822
- Rights
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Open Access; Der Zugriff auf das Objekt ist unbeschränkt möglich.
- Last update
-
14.08.2025, 10:47 AM CEST
Data provider
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Associated
- Chen, He
- Qu, Xiujie
- Luo, Yuedong
- Deng, Chenwei
- SpringerLink (Online service)
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Parallel FFT-hashing
High performance IIR filter implementation on FPGA
SFF—The Single-Stream FPGA-Optimized Feedforward FFT Hardware Architecture
Reduced-complexity FFT-based method for Doppler estimation in GNSS receivers
A Survey on Pipelined FFT Hardware Architectures
Remote Attacks on FPGA Hardware
Streamlined NTRU Prime on FPGA
On mandatory activation of welfare receivers
On mandantory activation of welfare receivers
A 5G Based Demodulator On FPGA
Fehler in der signalabhängigen FFT : (FFT= Fast Fourier Transform)
Fft. Wahlpropag. 5.11.70.
Parallel FFT-hashing